Radeon Instinct™ MI Series is the fusion of human instinct and machine intelligence, designed to be open from the metal forward.

Radeon Instinct family of server accelerator products brings in a new era of heterogeneous compute capabilities for Machine Intelligence and HPC systems by introducing an open approach to compute from the metal forward. Higher levels of datacenter performance and efficiencies are enabled through AMD’s introduction of world-class GPU technologies like the next generation “Vega” architecture and the Radeon Instinct’s open ecosystem approach to datacenter design through our ROCm software platform, support of various system architectures, and industry standard interconnect technologies.

Radeon Instinct family of products are designed to be the building-blocks for a new era of Deep Learning and HPC datacenters. AMD is designing and optimizing Radeon Instinct server accelerator products and software platforms to bring customers cost-effective machine and deep learning inference, training and edge-training solutions, where workloads can take the most advantage of our accelerator’s highly parallel computing capabilities. The Radeon Instinct products are also ideal for data-centric HPC-class systems in academic, government lab, energy, life science, financial, automotive, and other industries.

World’s Fastest Training Accelerator for Machine Intelligence and Deep Learning 4

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Cost-Sensitive, Scalable Accelerator for Machine and Deep Learning Inference Applications

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Versatile Training and Inference Accelerator for Machine Intelligence and Deep Learning

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Discover the Radeon Instinct™ MI Series

In-Depth Look at the Specifications

Compute UnitsTFLOPSMemory SizeMemory Bandwidth
Radeon Instinct™ MI25
Radeon Instinct™ MI25   64 nCU
4096 Stream Processors
FP16 / FP32 Performance
  484 GB/s
Radeon Instinct™ MI8
Radeon Instinct™ MI8   64
4096 Stream Processors
FP16 and FP32Performance
  512 GB/s
Radeon Instinct™ MI6
Radeon Instinct™ MI6   36
2304 Stream Processors
FP16 and FP32Performance
  224 GB/s

The Next Era of Compute and Machine Intelligence

Hyperscale and HPC-class heterogeneous compute for machine intelligence, deep learning and HPC workloads

Radeon Instinct provides customers with a new era of machine Intelligence capabilities for the datacenter.

AMD’s Radeon Instinct family of products, combined with our open ecosystem approach to heterogeneous compute, is raising the bar on achievable performance, efficiencies and the flexibility needed to design datacenters capable of meeting the challenges of today’s data-centric deep learning and HPC workloads.


ROCm Open Software Platform for HPC-class Rack Scale

Scalable, fully open source AMD ROCm software platform. Comprised of an open-source Linux® driver optimized for scalable multi-GPU computing, the ROCm software platform provides the use of multiple programming models and supports GPU acceleration using the Heterogeneous Computing Compiler (HCC), which allows developers to process code more easily with the C++ programming language and provides full machine control for heterogeneous compute.

Easier, more flexible programming model through ROCm software platform. The Radeon Instinct Server Accelerators are fully compatible with AMD’s ROCm software platform, which provides an easier, more flexible, programming model for AMD GPUs compared to previous models by supporting ISO C++, OpenCL™, CUDA (via AMD’s HIP conversion tool) and Python 1 (via Anaconda’s NUMBA) programming.

Open source compiler, tools and libraries from the metal forward. The Radeon Instinct’s open ecosystem approach with the ROCm software platform supports GPU acceleration using the open-source Heterogeneous Computing Compiler (HCC), which allows developers to process code more easily with the C++ programming language and provides full machine control for heterogeneous compute. ROCm provides a rich system run time, which is HSA 1.1 compliant, with the critical features that large-scale application, compiler and language-run-time development requires. The ROCm platform also includes a rich ecosystem of development tools and libraries, including the Heterogeneous Interface for Portability (HIP) Tool to help port code written for CUDA to C++ and MIOpen, a free, open-source library for GPU accelerators enabling high-performance machine intelligence frameworks including planned support for Caffe, Torch, TensorFlow, MxNet and others on ROCm platforms. 2

Open industry architecture and interconnect technologies support. The Radeon Instinct open ecosystem approach to heterogeneous compute brings support of major industry system architectures including x86, Power8, and ARM, along with industry standard interconnect technologies providing customer with the ability to design optimized datacenters for a new era of compute. 3

Our passion is gaming. Our work is professional. Our instinct has always been computing. And that’s what Radeon Instinct is all about.

Raja Koduri, Senior Vice President and Chief Architect at Radeon Technologies Group
  1. Support for Python is planned, but still under development.
  2. Planned support for machine Intelligence frameworks. Refer to www.GPUOpen.com web site for framework availability.
  3. Planned support for multiple architectures including x86, Power8 and ARM AMD also supports current interconnect technologies and has planned support for future industry standard interconnect technologies including GenZ, CCIX, and OpenCAPI™. Timing and availability of supported architectures and industry standard interconnect technologies will vary. Check with your system vendor to see whether your specific system has architecture/technology support.
  4. Measurements conducted by AMD Performance Labs as of June 2, 2017 on the Radeon Instinct™ MI25 “Vega” architecture based accelerator. Results are estimates only and may vary. Performance may vary based on use of latest drivers. PC/system manufacturers may vary configurations yielding different results. The results calculated for Radeon Instinct MI25 resulted in 24.6 TFLOPS peak half precision (FP16) and 12.3 TFLOPS peak single precision (FP32) floating-point performance. AMD TFLOPS calculations conducted with the following equation: FLOPS calculations are performed by taking the engine clock from the highest DPM state and multiplying it by xx CUs per GPU. Then, multiplying that number by xx stream processors, which exist in each CU. Then, that number is multiplied by 2 FLOPS per clock for FP32. To calculate TFLOPS for FP16, 4 FLOPS per clock were used. The FP64 TFLOPS rate is calculated using 1/16th rate. External results on the NVidia Tesla P100-16 (16GB card) GPU Accelerator resulted in 18.7 TFLOPS peak half precision (FP16) and 9.3 TFLOPS peak single precision (FP32) floating-point performance. Results found at: https://images.nvidia.com/content/tesla/pdf/nvidia-tesla-p100-PCIe-datasheet.pdf. External results on the NVidia Tesla P100-SXM2 GPU Accelerator resulted in 21.2 TFLOPS peak half precision (FP16) and 10.6 TFLOPS peak single precision (FP32) floating-point performance. Results found at: http://www.nvidia.com/object/tesla-p100.html AMD has not independently tested or verified external/third party results/data and bears no responsibility for any errors or omissions therein. RIV-1

The information contained herein is for informational purposes only, and is subject to change without notice. While every precaution has been taken in the preparation of this document, it may contain technical inaccuracies, omissions and typographical errors, and AMD is under no obligation to update or otherwise correct this information. Advanced Micro Devices, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this document, and assumes no liability of any kind, including the implied warranties of non-infringement, merchantability or fitness for particular purposes, with respect to the operation or use of AMD hardware, software or other products described herein. "Vega” and “Vega10” are AMD internal codenames for the architecture only and not product names. No license, including implied or arising by estoppel, to any intellectual property rights is granted by this document. Terms and limitations applicable to the purchase or use of AMD’s products are as set forth in a signed agreement between the parties or in AMD's Standard Terms and Conditions of Sale. GD-18

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